The second (and most important) family of FETs are those
known under the general title of IGFET
or MOSFET. In these FETs, the gate
terminal is insulated from the semiconductor body by a very thin layer of
silicon dioxide, hence the title ‘Insulated Gate Field Effect Transistor,’ or IGFET. Also, the devices generally use
a ‘Metal-Oxide Silicon’ semiconductor material in their construction, hence the
alternative title of MOSFET.
Shows
the basic construction and the standard symbol of the n-channel depletion-mode
FET. It resembles the JFET, except that its gate is fully insulated from the
body of the FET (as indicated by the symbol) but, in fact, operates on a
slightly different principle to the JFET. It has a normally-open n-type channel
between drain and source, but the channel width is controlled by the
electrostatic field of the gate bias. The channel can be closed by applying suitable
negative bias, or can be increased by applying positive bias.
In practice, the FET substrate may be
externally available, making a fourterminal device, or may be internally connected
to the source, making a three-terminal device. An important point about the IGFET/MOSFET
is that it is also available as an enhancement-mode device, in which its
conduction channel is normally closed but can be opened by applying forward
bias to its gate. Shows the basic construction and the symbol of the n channel version
of such a device. Here, no n-channel drain-to-source conduction path exists
through the p type substrate, so with zero gate bias there is no conduction
between drain and source; this feature is indicated in the symbol of Figure
13(b) by the gaps between source and drain. To turn the device on, significant positive
gate bias is needed, and when this is of sufficient magnitude, it starts to
convert the p-type substrate material under the gate into an nchannel, enabling
conduction to take place. Shows the typical transfer characteristics of an n-channel enhancement-mode
IGFET/MOSFET, and Figure 15 shows
the VGS/ID curves of the same device when powered from a 15V supply. Note that
no ID current flows until the gate voltage reaches a ‘threshold’ (VTH) value of
a few volts, but that beyond this value, the drain current rises in a non-linear
fashion. Also note that the transfer graph is divided into two characteristic regions,
as indicated (in Figure 14) by the dotted line, these being the ‘triode’ region
and the ‘saturated’ region. In the triode region, the device acts like a
voltage-controlled resistor; in the saturated region, it acts like a
voltage-controlled constant-current generator.
The
basic n-channel MOSFETs and 13 can —
in principle — be converted to p-channel devices by simply transposing their p
and n materials, in which case their symbols must be changed by reversing the
directions of their substrate arrows. A number of sub-variants of the MOSFET are in common use. The type
known as ‘DMOS’ uses a double-diffused manufacturing technique to provide it
with a very short conduction channel and a consequent ability to operate at
very high switching speeds.
Several other MOSFET variants are described in the remainder of this opening
episode. Note that the very high gate impedance of MOSFET devices makes them liable to damage from electrostatic
discharges and, for this reason, they are often provided with internal
protection via integral diodes or zeners, as shown in the example MOSFET, the main signal current flows
‘laterally’ through the device’s conductive channel. This channel is very thin,
and maximum operating currents are consequently very limited (typically to
maximum values in the range 2 to 40mA). In post-1970 times, many manufacturers have
tried to produce viable high-power/high-current versions of the FET, and the
most successful of these have relied on the use of a ‘vertical’ (rather than
lateral) flow of current through the conductive channel of the device. One of
the best known of these devices is the ‘VFET,’ an enhancement-mode power MOSFET which was first introduced by Siliconix
way back in 1976.
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